1. Field of the Invention
The present invention relates generally to the field of high speed data transfer, and more specifically to cell formatting for the asynchronous transfer mode (ATM) in accordance with the SPI-4 phase 2 specification.
2. Description of the Related Art
Data communication networks receive and transmit ever increasing amounts of data. Data is transmitted from an originator or requester through a network to a destination, such as a router, switching platform, other network, or application. Along this path may be multiple transfer points, such as hardware routers, that receive data typically in the form of packets or data frames. At each transfer point data must be routed to the next point in the network in a rapid and efficient manner.
Data transmission over fiber optics networks may conform to the SONET and/or SDH standards. As used herein, the SONET/SDH concepts are more fully detailed in various ANSI, ITU, and ITU-T standards, including but not limited to the discussion of SPI-4, Phase 2, in the Optical Internetworking Forum (OIF Document) OIF-SPI4-02.1 and ITU-T G.707 2000, T1.105-2001 (draft), T1.105.02-1995, and ITU-T recommendations G.7042 and G.707.
SPI-4 Phase II is an interface for packet and cell transfer between a physical layer (PHY) device and a link layer device, for aggregate bandwidths of OC-192 ATM and Packet over SONET/SDH (POS), as well as 10 Gb/s Ethernet applications.
The problem with the current interface scheme for ATM mapping over SONET/SPI-4 Phase 2 is that different devices employing the ATM mapping may have different requirements for data transmission. Certain devices can benefit from test modes, while other devices have uniform size payloads but employ different types of overhead data or administrative data. With odd sized data, transmission over the SPI-4 Phase 2 16 bit bus may present problems, such that a uniform cell format may require the transmitting entity to omit data or the transmission process itself may truncate data or provide an error indication in the case of a data mismatch, i.e. when more or less data is transmitted than fits across the interface. Any such truncation or error indication is highly undesirable.
Further, certain test modes may be employed, such as for purposes of evaluating system performance, where it may be desirable to omit data or otherwise transmit random payloads or data over the network. This data must also conform to the 16 bit bus requirement, or the result may be a loss of data or error indication.
A design that provides a cell format or set of cell formats may enable straightforward transmission of data in common formats so that different devices can be employed while simultaneously conforming to the SPI-4 Phase 2 standard, and particularly the 16 bit bus requirement.